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Description
The 3842A(AM)/43A(AM)/44A(AM)/45A(AM) are fixed frequency current mode PWM controller. They are specially designed for OFF-Line and DC to DC converter applications with a minimal external components. Internally implemented circuits include a trimmed oscillator for precise duty cycle control, a temperature compensated reference, high gain error amplifier, current sensing comparator, and a high current totempole output ideally suited for driving a power MOSFET. Protection circuitry includes built undervoltage lockout and current limiting. The 3842A(AM) and 3844A(AM) have UVLO thresholds of 16 V (on) and 10 V (off). The corresponding thresholds for the 3843A(AM)/45A(AM) are 8.4V (on) and 7.6V (off). The MIK3842A(AM) and MIK3843A(AM) can operate within 100% duty cycle. The 3844A(AM) and UC3845A(AM) can operate within 50% duty cycle. The 384XA(AM) has Start-Up Current 0.17mA (typ).
Features
* Low Start-Up and Operating Current * High Current Totem Pole Output * Undervoltage Lockout With Hysteresis * Operating Frequency Up To 300KHz (384XA) 500KHz (384XAM)
Pin Connection
Top view
Block diagram
(toggle flip flop used only in MIK3844, MIK3845)
7 V 8 5V VREF SET/ RESET UVLO VRE GOOD F LOGIC INTERNAL BIAS POWER VCC 7 1/2 VREF + 2 VFB
ERR 1V
36V
GND 5
2R
C.S. COMP
R PWM LATCH
OUT 6
COMP 1 CURRENT SENSE 3
R
S
T R /C T 5
OSCILLATOR
POWER GND
Absolute Maximum Ratings
Symbol VCC IO VI ISINK (E.A) Po Tstg TL Parameter Supply Voltage (low impedance source) Output Current Input Voltage (Analog Inputs pins 2,3) Error Amp Output Sink Current Power Dissipation (TA=250C) Storage Temperature Range Lead Temperature (soldering 5 sec.) Maximum 30 1 -0.3 to 5.5 10 1 -65 to150 260 Units V A V mA W o C
o
C
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Electrical characteristics
(*VCC=15V, RT=10k, CT=3.3nF, TA=00C to +700C, unless otherwise specified)
Characteristics Reference Section Reference Output Voltage Line Regulation Load Regulation Short Circuit Output Current Oscillator Section Oscillation Frequency Frequency Change with Voltage Oscillator Amplitude Error Amplifier Section Input Bias Current Input Voltage Open Loop Voltage Gain Power Supply Rejection Ratio Output Sink Current Output Source Current High Output Voltage Low Output Voltage Current Sense Section Gain Maximum Input Signal Supply Voltage Rejection Input Bias Current Output Section Low Output Voltage High Output Voltage Rise Time Fall Time Undervoltage Lockout Section Start Theshold Min. Operating Voltage (After Turn On) PWM Section Max. Duty Cycle Min. Duty Cycle Total Standby Current Start-Up Current D(MAX) D(MAX) IST MIK384XA(AM) 30 0.17 13 38 MIK3842A(AM)/43A(AM) MIK3844A(AM)/45A(AM) 95 47 97 48 100 50 0 0.3 17 % VTH(ST) VOPR(min) MIK3842A(AM)/44A(AM) MIK3843A(AM)/45A(AM) MIK3842A(AM)/44A(AM) MIK3843A(AM)/45A(AM) 14.5 7.8 8.5 7.0 16.0 8.4 10 7.6 17.5 9.0 11.5 8.2 V V f f/VCC V(OSC) IBIAS VI(E.A) AVOL PSRR ISINK ISOURCE VOH VOL GV VI(MAX) SVR IBIAS VOL VOH tR tF TJ = 25 C MIK384XA MIK384XAM 12V VCC 25 V (peak to peak) VFB=3V Vpin1 = 2.5V 2V V0 4V 12V VCC 25 V Vpin2 = 2.7V, Vpin1 = 1.1V Vpin2 = 2.3V, Vpin1 = 5V Vpin2 = 2.3V, RL = 15K to GND Vpin2 = 2.7V, RL = 15K to PIN 8 (Note 1 & 2) V pin1 = 5V (Note1) 12V VCC 25 V (Note 1) Vpin3 = 3V ISINK = 20 mA ISINK = 200 mA ISINK = 20 mA ISINK = 200 mA TJ = 25 CL = 1nF (Note 3) C, TJ = 25 CL = 1nF (Note 3) C, 13 12 2.85 0.9 47 47 50 52 0.05 1.6 -0.1 2.5 90 70 7 -1.0 6.0 0.8 3.0 1.0 70 -3.0 0.08 1.4 13.5 13.0 45 35 1.1 3.15 1.1 -10 0.4 2.2 V -2 2.58 57 57 1.0 KHz % V A V dB mA mA V VREF VREF VREF ISC TJ = 25 IREF = 1 mA C, 12V VCC 25 V 1 mA IREF 20mA TA = 25 C 4.9 5.0 6.0 6.0 -100 5.1 20 25 -180 mA V mV Symbol Test Conditions Min Typ Max Units
2.42 65 60 2 -0.5 5.0
V/V V dB A
150 150
nS
Operating Supply Current ICC (OPR) Vpin3 = Vpin2 = 0V Zener Voltage VZ ICC=25 mA * - Adjust VCC above the start threshold before setting it to 15V. Note 1: Parameter measured at trip point of latch with Vpin2=0. Note 2: Gain defined as A=Vpin1/Vpin3 ; 0 Vpin3 0.8V. Note 3: These parameters, although guaranteed, are not 100% tested in production.
mA V
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Pin functions
N 1 2 3 4 5 6 7 8 Function COMP VFB ISENSE RT/CT GROUND OUTPUT VCC Vref Description This pin is the Error Amplifier output and is made for loop compensation. This is the inverting input of the Error Amplifier. It is normall y connected to the switching power supply output through a resistor divider. A voltage proportional to inductor current is connected to this input. The PWM uses this information to terminate the output switch conduction. The oscillator frequency and maximum Output duty cycle are programmed by connecting resistor R T to Vref and capacitor CT to ground. This pin is the combined control circuitry and power ground. This output directly drives the gate of a power MOSFET. Peak currents up to 1A are sourced and sink by this pin. This pin is the positive supply of the integrated circuit. This is the reference output. It provides charging current for capacitor C T through resistor RT .
Application information
2.5V 1mA
VFB COMP
2 1
Figure 1. Error Amp Configuration VCC 7
ON/OFF COMMAND TO S/R OF IC
ICC
MIK3842 MIK3843 MIK3844 MIK3845
13mA
VON VOFF
16V 10V
8.4V 7.6V
0.2mA
VCC VOFF VON
During UVLO, the Output is low
Figure 2. Undervoltage Lockout
ERROR AMP
+ VFB 2 _
2R 1V R CURRENT SENSE COMPARATOR
COMP 1 IS R
CURRENT SENSE
3 5
RS
C GND
Peak current is determined by
IS max
1.0V RS
Figure 3. Current Sense Circuit
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VREF RT RT /CT RSLOPE IS R1 RS ISENSE
8
VREF RT
8
4
RT /CT MIK3842 IS RSLOPE R1
5
4
MIK3842
3
ISENSE
3 5
GND
RS
GND
Figure 4. Slope Compensation Techniques
SCR must be selected for a holding current of less than 0.5mA. The simple two transistor circuit can be used in place of the SCR as shown.
Figure 5. Latched Shutdown
From V0 2.5 V RI Cf VFB 2 Rd Rf 1 COMP
+ -
From V0
+
1mA EA R 2R Cp Cf Rp RI VFB
2.5 V
+ -
+
1mA EA R 2R
2 Rf COMP 1
5
Error Amp compensation circuit for stabilizing any current-mode topology except for boost and flyback converters operating with continuous inductor current. Error Amp compensation circuit for stabilizing current-mode boost and flyback topologies operating with continuous inductor current.
5
Figure 6. Error Amplifier Compensation
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Figure 7. External Clock Synchronization
Figure 8. Soft-Start Circuit
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Typical Performance Characteristics
RT (K )
50
%
50 C C 20 5nF 30 20 C 500pF C 1nF C 10nF 5nF C 2nF
10
10 C 200pF
5 C 10nF
5 C 3 100pF
2
1 10 500
VCC = 15 O 25 T C 20 30 50 100 200 300
2
VCC = T =
15 V
O
25
f
KHz)
1 10 500
20
30
50
100
200
300
f
KHz)
Figure 1. Timing Resistor vs. Oscillator Frequency.
Dm ax (%)
Figure 2. Output Dead-Time vs. Oscillator Frequenc . y
(dB)
90 80
VCC = 15 V VO = 2V to 4V 100K R = L
O
25
C
80
60
70
40
60
V = CC
15 V 3.3nF = 25
20
50
T
0
40 1 2 3 5
-20
Figure 3. Maximum Output Duty Cycle vs. Timing Resistor (MIK3842/4 3 .)
Vth (V) 1.0
VCC = 15V
R( T
10
100
1K
10K
100K
1M
f (Hz)
Figure 4. Error Amp Open-Loop Gain vs. Fr . equency
IS C (mA)
100
VCC = 15 V
0.8
T
O
90
25 C
0.6
T
O
80
125 C
0.4
70
0.2
60
50 0 2 4 V ( O 0 25 50 75 100
O
T
)
Figure 5. Current Sense Input Threshold vs.
Figure 6. Reference Short Circuit Current vs.
Error Amp Output Voltage.
Temperature.
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Vsat (V) -1
V 15 V
ICC (m A) Sourse Saturation (Load to Ground)
-2
80 s R ate
Pulsed Load 120Hz
20
3
15
2
10
I = nse Se
0V
1
Sink Sa tura tion (Lo a d to
5
0V 10K R T = 25 A C 3.3nF C
0 0
Figure Current
0 200 400 600 I (m O 0
Figure . 8 Voltag . e
10 20
30
V
( CC
. Output Saturation Voltage vs. Load 7 T 25 .
Supply Current vs. Supply
VCC Vref 8 PWM RT R C T 4 ID OUTPUT SMALL RT / LARGE 5 GND
Figure 9. Oscillator and Output Waveforms
7 5V REG 6 OUTPUT R /C T OUTPUT CLOCK OSCILLATOR LARGE R / SMALL C T
T
/ T
R /C T
T
Ordering Information
O RDERI NG NUM BER 3842 / 43 / 44/ 45 P ACK AG E SOP -8 / DI P - 8 6A06--6A07 Rm 6A07,Changyin Office Building ,No.88,Yong Ding Road,Hai Dian District ,Beijing Postalcode:100039 Tel: 86-010-58895780 / 81 / 82 / 83 / 84 Http://www.estek.com.cn Email:sales@estek.com.cn REV No:01-060815
BEIJING ESTEK ELECTRONICS CO.,LTD
M AR K I NG KA3842/ 43 / 44/ 45
Address :
Fax : 010-58895793
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